The present disclosure relates generally to semiconductor design, and more specifically to controlling and resolving deadlock conditions.
As the complexity of integrated circuits continues to grow, certain implementations have introduced new problems that must be overcome. Consider for example, implementation of single chip designs, (referred to as “system-on-a-chip”). In system-on-a-chip designs, which typically use cross point switches for managing internal communications, the number of interfaces has grown. Accordingly, the number and complexity of potential and actual communication conflicts have grown as well.
Existing techniques for arbitration by the cross point switches typically result in deadlock situations (or conditions) because of the complexity. Therefore, what is needed a technique for resolving deadlock situations within a single chip.